Abstract:
Decimal data processing applications have grown at a very fast rate in recent years. The IEEE 754-2008 standard for floating point arithmetic has already dictated the importance of decimal arithmetic. In Computer Science where the demand of accurate data processing is highly required, decimal arithmetic
plays an important role to support the most accurate data processing at the level of financial and scientific calculations where errors aren't bearable. In most hardware approaches that have been proposed for decimal arithmetic, the implementation is very expensive in terms of occupied resources and path delay. So, in this paper we have proposed Vedic BCD multiplier using the Vedic mathematics. The analyzed synthesized results will clearly explain the performance of Vedic BCD multiplier as compared to previously proposed BCD multipliers.
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